Multiprocessor system having a plurality of gateway units and wherein each gateway unit controls memory access requests and interferences from one hierchical level to another

申请公布号：: US6131153(A)
申请号：: US19970817934
申请日期：: 1997.07.11
申请公布日期：: 2000.10.10
申请人：: NKK CORPORATION
发明人：: TAKAMATSU, HAJIME
分类号：: G06F9/50;(IPC1-7):G06F15/16
主分类号：: G06F9/50
摘要：: PCT No. PCT/JP95/02232 Sec. 371 Date Jul. 11, 1997 Sec. 102(e) Date Jul. 11, 1997 PCT Filed Oct. 31, 1995 PCT Pub. No. WO96/13779 PCT Pub. Date Sep. 5, 1996In order to obtain a multiprocessor system capable of increasing the number of data processors without changing an operating system program, a multiprocessor system includes a main memory (7) which stores an application program and an operating system program, a plurality of data processors (3-6) each including at least one data processor to perform distributed processing of the application program in accordance with the operating system program, a plurality of system buses (1A-1E) connected between the plurality of data processors (3-6) and the main memory (7), and a plurality of gateway units (2A-2E) inserted in the system buses (1A-1E) to set a hierarchical order of the main memory (7) and the plurality of data processors (3-6) using the main memory as a highest hierarchical level and allow data transmission between the hierarchical levels, each of the plurality of gateway units being arranged to monitor memory access requests from hierarchical levels lower than a corresponding hierarchical level and control to hold the memory access request when the memory access request interferes with memory access from the corresponding hierarchical level.