METHOD OF FORMING 1-ELEMENT FET-MEMORY CAPACITOR CIRCUIT
- 申请公布号：
- JPS6010773(A)
- 申请号：
- JP19840097639
- 申请日期：
- 1984.05.17
- 申请公布日期：
- 1985.01.19
- 申请人：
- INTERN BUSINESS MACHINES CORP
- 发明人：
- HIYUU HAABAATO CHIYAO
- 分类号：
- H01L27/10;H01L21/033;H01L21/8242;H01L27/108;H01L29/78
- 主分类号：
- H01L27/10
- 摘要：
- Different insulators for the storage capacitor and the FET gate in a single FET and storage capacitor memory cell, are formed by a process which does not involve the use of a special masking level. The patterned mask (18; 46) having a window (19; 47) to define the capacitor area of the memory cell, is used to enable the capacitor insulator and the gate insulator of the FET to be formed independently so that the structure of the capacitor insulator can be different from that of the gate insulator.
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