SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

申请公布号：

JPS61168953(A)

申请号：

JP19850009436

申请日期：

1985.01.22

申请公布日期：

1986.07.30

申请人：

NEC CORP

发明人：

HIRANO YOJI

分类号：

H01L27/08;H01L27/092

主分类号：

H01L27/08

摘要：

PURPOSE:To increase latch-up resistance, by inserting a Schottky barrier diode between a power source terminal and an output terminal, in a semiconductor integrated circuit device including a complementary type MOS integrated circuit. CONSTITUTION:A window is formed in a part of an insulating layer 9. An anode electrode 18 is formed and a Schottky barrier diode D1 is formed together with a semiconductor substrate 1. The anode electrode 18 is connected to an output terminal OUT. When a positive surge voltage is applied to the output terminal OUT, the potential difference between the output terminal OUT and a power supply terminal VDD is clamped by the forward voltage of the Schottky barrier diode D1. The forward voltage of the diode D1 is set at a value, which is smaller than the forward voltage between the emitter and the base of a transistor Q6. Thus the transistor Q6 is not conducted and kept in the cut-OFF state. Transistors Q3, Q4 and Q5 are also kept in the cut-OFF state, and a latch-up phenomenon does not occur.