CIRCUIT HAVING PLURALITY OF ULTRASONIC WAVE ECHO GATES
- 申请公布号：
- JPS57108658(A)
- 申请号：
- JP19800183851
- 申请日期：
- 1980.12.26
- 申请公布日期：
- 1982.07.06
- 申请人：
- TEITSUU DENSHI KENKYUSHO:KK
- 发明人：
- MOTOSUGA NOBUYUKI;SAIKAI HIDEO;KATOU YUUICHI;NAKAYAMA MASAHISA
- 分类号：
- G01N29/38
- 主分类号：
- G01N29/38
- 摘要：
- PURPOSE:To make it possible to ensure the reception of echo signals and to obtain accurate measured results in basic echo gates which selectively receive the range of the received echo, by holding the echo signal with arbitrary delay. CONSTITUTION:The basic gate 2 gives a strobe signal 12 to a comparator 3 at a timing from a synchronizing circuit 1 and a sampling starting stignal to an FF4. A received echo signal 15 and a reference level signal 16 which can be arbitrarily set are supplied to a comparator 3. When the trailing edge of the echo during the input of the signsl 12 crosses the signal 16, the detected signal 17 is given to the FF4 and a sampling signal 18 is reset. A delay and control circuit 5 gives a clock signal 19 to a ring counter 6 based on the signal 17. A counter 6 gives a sampling signal 20 to sample and hold circuits 72-7n. Each sample and hold value is sequentially converted in an A/D converter 9 through a multiplexer 8 and the result is outputted.
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