method for fabricating an embedded vertical bipolar transistor and a memory cell

申请公布号:
US5547893(A)
申请号:
US19950578923
申请日期:
1995.12.27
申请公布日期:
1996.08.20
申请人:
VANGUARD INTERNATIONAL SEMICONDUCTOR CORP.
发明人:
SUNG, JANMYE
分类号:
H01L21/8242;H01L21/8249;H01L27/06;(IPC1-7):H01L21/70;H01L27/00
主分类号:
H01L21/8242
摘要:
The present invention provides a method of simultaneously forming CMOS DRAM cells, CMOS devices, and vertical bipolar transistors on the same chip. The invention utilities a CMOS DRAM process to simultaneously fabricate a vertical bipolar transistor and uses only one additional mask (a base implant mask) compared to forming the DRAM cell alone. Also, to reduce the bipolar collector plug resistance, the process uses a tungsten-plug module where the collector is formed within a field oxide region near the base.
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