Semiconductor device and method of manufacturing the same
- 申请公布号：
- EP0844660(A1)
- 申请号：
- EP19970120656
- 申请日期：
- 1997.11.25
- 申请公布日期：
- 1998.05.27
- 申请人：
- MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
- 发明人：
- UKEDA, TAKAAKI;KUDO, CHIAKI;YABU, TOSHIKI
- 分类号：
- H01L21/762;H01L23/522
- 主分类号：
- H01L21/762
- 摘要：
- The top surface of a P-type semiconductor substrate is partitioned into an active region to be formed with an element and an isolation region surrounding the active region. The isolation region is composed of trench portions and dummy semiconductor portions. An interlayer insulating film is deposited on the substrate, followed by a wire formed thereon. In each of the semiconductor portions, an impurity diffusion layer is formed simultaneously with the implantation of ions into the element so that a PN junction is formed between the impurity diffusion layer and the silicon substrate. A capacitance component of the wiring-to-substrate capacitance in the region containing the semiconductor portions is obtained by adding in series the capacitance in the impurity diffusion layer to the capacitance in the interlayer insulating film, which is smaller than the capacitance only in the interlayer insulating film. What results is a semiconductor device having lower total wiring-to-substrate capacitance and a higher operating speed. <IMAGE>
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