System for measuring surface flatness using shadow moir+E,acu e+EE technology

申请公布号:
US5835223(A)
申请号:
US19960778214
申请日期:
1996.12.30
申请公布日期:
1998.11.10
申请人:
ELECTRONIC PACKAGING SERVICES, LTD.
发明人:
ZWEMER, DIRK A.;HASSELL, PATRICK B.
分类号:
G01B11/30;(IPC1-7):G01B11/30;G01B11/00;G01N21/00
主分类号:
G01B11/30
摘要:
A system for measuring surface characteristics of an electronic interconnection component, such as a printed circuit board, by analyzing shadow moir+E,acu e+EE patterns. Printed circuit boards are carried on a continuous conveyor under a grating. For each printed circuit board, a shadow moir+E,acu e+EE fringe pattern is created in response to a determination that the printed circuit board is properly located under a grating and within the field of view of a camera. Fringes of the shadow moir+E,acu e+EE fringe pattern are quantified over one or a multiple of analysis paths to determining if the printed circuit board is unacceptably warped, in which case a signal is generated. For each printed circuit board, multiple images can be captured and mathematically combined, by image subtraction, to produce an enhanced shadow moir+E,acu e+EE fringe pattern that is analyzed for warpage.
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