PLL CIRCUIT

申请公布号：

KR20010050937(A)

申请号：

KR20000059449

申请日期：

2000.10.10

申请公布日期：

2001.06.25

申请人：

NEC CORPORATION

发明人：

TANIMOTO SUSUMU

分类号：

H03L7/093;H03L7/08;H03L7/085;H03L7/089;H03L7/18;(IPC1-7):H03L7/085

主分类号：

H03L7/093

摘要：

PURPOSE: To provide a PLL circuit which prevents the occurrence of a phase offset and reduces an operation voltage. CONSTITUTION: A phase control part 21 of the PLL circuit where a charge pump part is divided into two of an integrating part 20 and the phase control part 21 outputs differential outputs, and two outputs are connected by a resistance element R to eliminate a bias difference, and thus a stable low-voltage operation is realized.