Methods and apparatuses for time and space switching of sonet framed data
- 申请公布号：
- AU8907301(A)
- 申请号：
- AU20010089073
- 申请日期：
- 2001.09.14
- 申请公布日期：
- 2002.03.26
- 申请人：
- CIENA CORPORATION
- 发明人：
- M. SHIVJI ALNOOR;TOMAR SUNIL;SINGH SHASHIJ
- 分类号：
- H04J3/16;H04Q11/04
- 主分类号：
- H04J3/16
- 摘要：
- Multiple streams of bits are received. One or more bits are selected from a stream of bits based, at least in part, on a space control register value and a time control register value. In one embodiment, a time control register stores a value indicating a selected bit from a sequence of bits, a counter counts bits in the sequence of bits from a predetermined bit, and a comparator is coupled to the time control register and to the counter to generate a load signal when a value stored in the time control register and a value provided by the counter are equal. The load signal causes the latch to load a value output by the multiplexer.
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