WIRING BOARD WITH BUILT-IN CAPACITOR AND ITS MANUFACTURING METHOD
- 申请公布号：
- JP2009043768(A)
- 申请号：
- JP20070204187
- 申请日期：
- 2007.08.06
- 申请公布日期：
- 2009.02.26
- 申请人：
- NGK SPARK PLUG CO LTD
- 发明人：
- SEKI TOSHITAKE;INUI YASUHIKO;OTSUKA ATSUSHI;SATO MANABU
- 分类号：
- H05K3/46;H01L23/12;H05K1/16
- 主分类号：
- H05K3/46
- 摘要：
- <p><P>PROBLEM TO BE SOLVED: To provide a wiring board with a built-in capacitor which increases reliability by preventing peel-off between a through-via conductor and the other conductor, and its manufacturing method. <P>SOLUTION: A capacitor 10 embedded in resin interlayer insulating layers 81 and 82 has an electrode layer 11 and a dielectric layer 21. The dielectric layer 21 is formed on the first principal plane 12 and the second principal plane 13 of the electrode layer 11. A through-via conductor 121 which penetrates the capacitor 10 in a thickness direction is provided in the resin interlayer insulating layers 81 and 82. The bottom of the through-via conductor 121 is in surface contact with an inner layer side conductor layer 123. The periphery of the through-via conductor 121 is in surface contact with the first principal plane 12 side opening edge, the inner wall surface, and the second principal plane 13 side opening edge of an electrode layer side through-hole 112. The outer diameter of the through-via conductor 121 is larger than the inner diameter of the electrode layer side through-hole 112. <P>COPYRIGHT: (C)2009,JPO&INPIT</p>
Copyright Notice © 2009-2024 传众 版权所有